IS43R16160D-5BL

ISSI
870-IS43R16160D-5BL
IS43R16160D-5BL

製造商：

說明：
DRAM 256M (16Mx16) 200MHz 2.5v DDR SDRAM

規格書:
ECAD模型:
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供貨情況

庫存：
暫無庫存
工廠前置作業時間：
最少： 190   多個： 190
單價:
HK$-.--
總價:
HK$-.--
估計關稅:
此產品免費航運

Pricing (HKD)

數量 單價
總價
HK$50.64 HK$9,621.60
HK$49.40 HK$28,158.00
HK$48.17 HK$54,913.80
2,660 報價

商品屬性 屬性值 選擇屬性
ISSI
產品類型: DRAM
RoHS:  
SDRAM - DDR
256 Mbit
16 bit
200 MHz
FBGA-60
16 M x 16
5 ns
2.3 V
2.7 V
0 C
+ 70 C
IS43R16160D
Tray
品牌: ISSI
組裝國家: Not Available
擴散國: Not Available
原產國: TW, CN
濕度敏感: Yes
安裝風格: SMD/SMT
產品類型: DRAM
原廠包裝數量: 190
子類別: Memory & Data Storage
電源電流 - 最大值: 330 mA
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所選屬性: 0

規格書

此功能需要啟用JavaScript。

CNHTS:
8542319090
USHTS:
8542320024
JPHTS:
854232021
KRHTS:
8542321010
MXHTS:
8542320201
ECCN:
EAR99

IS43R32800D 8Mx32 256-Mbit DDR SDRAM

ISSI IS43R32800D 8Mx32 256-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 268,435,456-bit memory array is internally organized as four banks of 64MB to allow concurrent operations. The pipeline allows Read and Write burst accesses to be virtually continuous, with the option to concatenate or truncate the bursts. The programmable features of burst length, burst sequence, and CAS latency enable further advantages.

DDR SDRAM

ISSI 512-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 536,870,912-bit memory array is internally organized as four banks of 128Mb to allow concurrent operations. The pipeline allows Read and Write burst accesses to be virtually continuous, with the option to concatenate or truncate the bursts. The programmable features of burst length, burst sequence, and CAS latency enable further advantages. The device is available in 8-bit, 16-bit, and 32-bit data word sizes. Input data is registered on the I/O pins on both edges of Data Strobe signal(s), while output data is referenced to both edges of Data Strobe and both edges of CLK. ISSI 512-Mbit DDR SDRAM commands are registered on the positive edges of CLK.

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